FSB, CSI, IMC, and Hyper Transport

To the date I strongly believe that AMD's success is a result of Intel's mistakes, rather than any exceptional invention/execution on AMD's part. I will analyze why Intel made the mistakes it did in some other post--there were some genuine reasons (and having moronic engineers is not one of them), and for all we know, AMD could have made the same mistakes as well. Afterall, making mistakes and screwing up execution had been trademark of AMD until 2001.

Anyways...

The purpose of this post is to get some things off of my chest. I have tried posting this material on many pro-AMD blogs (pogs?), but I always got censored. Now that no one can censor me, I think I can just say what I want to say...

AMDers like to think that IMC is AMD's greatest gift to the mankind, and it unequivocally demonstrates AMD's supremacy when it comes to architecture. And don't even get them started on hyper transport--their eyes glow up, their jaws drop down, and they start drooling like a hungry dog in a meat factory. What they fail to realize is, IMC and Hyper Transport are just a very very small part of the overall CPU architecture. All they provide is a CPU-to-CPU and CPU-to-memory interconnect.

Now Computer Architecture is all about making compromises, and neither Intel nor AMD are coming out with any earth-shattering innovations here--everything that was there to be invented was invented in late 50s/early 60s. Both Intel and AMD are just using the millions (billions?) of transistors that are now available to them to make their own architectural compromises. IMC and HT is *ONE WAY* of improving the interconnect. But certainly it is not the only way.

Having larger and faster caches coupled with good prefetcher is certainly another very effective way of improving the interconnect--and currently Intel is using this way very effectively to counter AMD's IMC+HT onslaught. Core2Duo is the prime example of this. In video encoding, C2D is about 30% faster than equally clocked Athelons. In games that are not GPU constrained, it is 30% to 50% faster than the Athelon. In fact Intel is so successful with this strategy that they don't even need the 1333 MHz FSB that they are capable of. They launched C2D with just 1066 MHz FSB, and it is impossible to come up with a real-life benchmark in which a K8-based CPU can outperform C2D.

In fact, the recent reviews of Kentsfield indicate that the FSB is not a bottleneck at all. In fact, in video encoding, just a 1066 MHz FSB allows Kentsfield to have linear performance scaling. If the 1066 bus is sufficient for Kentsfield, it ought to be enough for for Conroe. Also, with Tulsa, Intel showed once again that FSB is not always the limiting factor.

So why is Intel bothered with CSI? Well, for the first, a faster interconnect would allow them to provide the same performance with lower cache. Lower cache implies smaller dies size, which implies higher margins. Thus, I believe, it has all to do with margins, and has got nothing to do with the performance you and me are going to see. For the end user, how does it matter if my computer has an FSB or CSI or HT. Finally what matters is performance. And as far as desktops and 2P servers are concerned, HT can easily be countered with a slightly larger cache. In fact, Tulsa's benchmarks indicate that that it FSB may not even be an issue in the 4P segment.

That brings me to my other point. Many AMD fanboys (Sharikou included) keep on arguing that when CSI comes out, it will be slower than HT. Well, frankly, that does not mean dudly squat! If Intel can beat the crap out of AMD CPUs using FSB, it can definitely do that using CSI. They may not be able to reduce the cache size and improve the margins by as much as they like, but they can definitely own the performance crown. Remember that they have the industry-leading process and yields allowing them to be wasteful with the silicon real estate.

CSI/HT does matter in the 8P space (and in 4P space in some benchmarks). But honestly, now that both Intel and AMD have started packing more and more cores on the CPUs, are we even going to have 8P systems anymore? With Penryn, Intel will most-likely become a 4-core-minimum supplier. Four of these CPUs would give you 16 cores in total. What is the market for systems with more than 8 or 16 cores. I am not an expert here, but I doubt that it is anything significant. Essentially, by packing multiple cores on a single chip, Intel and AMD are making the MP market irrelevant. So AMD today has performance advantage in a market segment that is quickly becoming irrelevant. I would really like to see how it all pans out.

Anyways, now that I have said everything I wanted to say, I can go to bed....